Vijay Gopal TV

About

Hello! I am a Microelectronic Engineer with an interest in developing processes, fabricating devices and testing them out! I have been working on semiconductor fabrication techniques since my sophomore year at RIT. I started working on III-Nitride devices as an undergraduate towards my senior project and stayed on to continue towards my Master's.

I am interested in working further towards high-frequency and high-power devices in GaN and with other wide-bandgap semiconductors like gallium oxide and diamond.

Education

Master of Science, Microelectronic Engineering

Rochester Institute of Technology, NY USA
August 2019 - May 2021

Bachelor of Science, Microelectronic Engineering

Rochester Institute of Technology, NY USA
August 2014 - May 2019

Publications

M. Hartensveld, B. Melanson, V. Thirupakuzi Vangipuram, J. Zhang, "450 nm Gallium Nitride alternating current light-emitting diode" , IEEE Photonics Journal, DOI: 10.1109/JPHOT.2020.3032382

Research Work and Previous Projects

Current Work

I am currently working towards my Master's thesis under Dr. Jing Zhang. As part of my thesis, I am working on a couple very interesting projects:

Designing, fabricating and testing a unique Vertical GaN Nanowire Static Induction Transistor (SIT) Memory device using a top-down fabrication approach.
A GaN etching technique that utilizes a cyclic method to slowly and accurately etch layers of GaN. I am trying to characterize and quantify using a similar approach in order to reliably further shrink GaN nanowires and gauge its effects. Previous work has shown this to be very effective for etching AlGaN layers in HEMT gate regions for enhancement-mode devices.

Previous Work and Projects

Fabrication of AlGaN/GaN High Electron Mobility Transistors

Fabrication of AlGaN_GaN High Electron Mobility Transistors.pdf

Senior Design Project : Fabrication of AlGaN/GaN High Electron Mobility Transistors

A first fabrication attempt of an AlGaN/GaN HEMT on Si substrate at RIT.
I came up with a relatively simple process flow and went through a first run of fabrication over the course of my senior year towards an enhancement-mode device.

Spring 2019

FinalPaper_SiGeVijay_Spring2019.pdf

Review of Ohmic Contacts to GaN and AlGaN

A quick term paper to summarize the results a few papers showed in regards to Ohmic contacts to GaN. This was a summary of a few papers compiled together and written for a SiGe and SOI Devices course. The main goal in me writing this paper was to delve deeper and provide ideas and an increased understanding towards better HEMT devices based off of results I had originally obtained for Senior Design.

Spring 2019

QuantumFinalProject_Ver3.pdf

Well Shapes and Derivation of Energy Levels

Final paper with associated MATLAB code written for Physics of Nanostructures course. Feel free to use the code to calculate energy levels for different quantum well shapes and conditions! Well shapes include square, linear-triangular, v-shaped triangular, full harmonic and half-harmonic oscillators.

Fall 2019

Funded University Project: PCB Piezotronics - RIT

Worked under Dr. Ivan Puchades to provide ideal implant and anneal step recipes and conditions for a MEMS process. Processed a set of wafers at RIT's SMFL cleanroom and provided details of steps to PCB Piezotronics. Performed as a DOE with target ranges specified for surface concentration, peak concentration and junction depth.

Summer 2019

Vijay MEMS Final Paper.pdf

MEMS Fabrication

Final paper written at the end of a MEMS Fabrication course where I designed, fabricated and tested a thermally-actuated 2-D micromirror.

Fall 2018

Work Experience

Stanford Nanofabrication Facility
Stanford, CA

Assistant for Training and Education Development June 2016 - August 2016
Produced course material and videos to aid in training professionals and students in cleanroom processes and equipment use at the Stanford Nanofabrication Facility.

Applied Image Inc.
Rochester, NY

Lithography Engineer Intern September 2016 - December 2016
Processed and manufactured optical parts for cell counters, calibration standards and other products while helping improve exposure, development and etching parameters to achieve designs' critical dimensions. Created and updated standard operating procedure documents for new and existing manufacturing processes and tools.

Metrigraphics LLC. (Now Cirtec Medical)
Lowell, MA

Process Engineer Intern January 2018 - July 2018
Processed and manufactured electrical, optical and opto-electronic parts and thin film flex circuits. Helped increase manufacturing yields through optimization experiments to find better parameters for exposure, development and sputtering.

Micron Technology
Lehi, UT

Manufacturing Engineer Intern May 2020 - August 2020
Worked in Metrology Engineering department within a team of process owners. Worked with sampling and automation engineer to develop models and simulation sets for run-to-run control and show effects of sampling rates and run-to-run control factors on overall process performance and key process performance metrics.

Relevant Coursework Taken

IC Technology
Statistics and Design of Experiments
Lithography Materials and Processing
Semiconductor Process Integration
Semiconductor Device Physics
Thin Films
Nanolithography Systems
CMOS Processing
Microelectronic Manufacturing
SiGe and SOI Devices and Technologies
Physics of Nanostructures
Physical Modeling of Semiconductor Devices
Epitaxial Crystal Growth (Currently taking)

Pictures!

Contact

Email:
vxt1789@rit.edu
vijaygopaltv@gmail.com

Phone:
585-755-4640

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